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Accelerating Scientific Workflows with the NVIDIA Grace Hopper Platform
DescriptionNVIDIA Grace Hopper Superchips are a scale-up architecture ideal for scientific computing workflows involving CPUs and GPUs. Building on a decade of GPU acceleration, Grace-Hopper realizes NVIDIA NVLink C2C, a 900 GB/s interconnect between the Grace CPU and the Hopper H100 GPU. C2C enables coherent memory at 7x the bandwidth of PCIe across Hopper’s 96GB HBM3 and Grace’s up to 480GB LPDDR5X. This removes the conceptual CPU/GPU memory divide and lowers barriers for scientists accelerating their applications with ever faster GPUs, e.g., H100 delivering up to 67 FP64 teraflops and 4 TB/s memory bandwidth. With more application code executing on GPUs, workload performance becomes increasingly susceptible to non-GPU limiters like data movement and CPU performance (Amdahl’s Law). C2C and the Grace CPU, ideal for single-thread or multi-core CPU workloads, restore the required balance . Grace combines 72 Arm Neoverse-V2 cores with NVIDIA Scalable Coherency Fabric, a distributed cache and mesh fabric with 3.2 TB/s bi-section bandwidth. This high bandwidth mesh enables one NUMA node for all 72 CPU cores, simplifying multi-core programming. Each core implements a 512-bit SVE2 SIMD pipeline for a total CPU FP64 theoretical peak of 7.1 teraflops. When combined with the up to 500 GB/s memory bandwidth of the LPDDR5X DRAM, Grace delivers twice the performance-per-Watt of conventional x86-64 CPUs. This session presents HPC and AI workload performance results with a technical deep-dive into the specific features of Grace-Hopper that accelerate each workload. We discuss how Grace-Hopper's distinctive coupling of the CPU/GPU hardware and the accompanying software stack create a platform which increases developer productivity, accelerates existing applications, and facilitates new standard programming models in C++, Fortran, and Python. Attendees will gain a deeper understanding of how to extract the performance offered by Grace-Hopper and realize the potential of this innovative, energy-efficient platform for science and industry.
Presenter
Event Type
Exhibitor Forum
TimeThursday, 16 November 20231:30pm - 2pm MST
Location503-504
Artificial Intelligence/Machine Learning
Architecture and Networks
Hardware Technologies
TP
XO/EX