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Evaluating the Resiliency of Posits for Scientific Computing
DescriptionIEEE-754 is the de-facto standard for the implementation of floating point number systems in hardware, although recently, posits have been proposed as a drop-in replacement. Recent work has suggested that posits can offer greater numerical accuracy and reproducibility than IEEE-754-compliant floating point numbers at a comparable architectural cost. There have been several studies that consider the use of posits and other floating-point implementations in hardware and software, but there is limited work examining this new number system from a reliability perspective. In this paper, we evaluate the resiliency of posits to inform hardware design for fault-tolerant systems. Our analysis breaks down the impact of bit flips on the various fields within both floating-point standards. After examining the patterns and quirks regarding bit flip error in posits, we conclude that posits offer superior resiliency than the IEEE-754 standard in the majority of cases.
Event Type
Workshop
TimeSunday, 12 November 20234:40pm - 5:05pm MST
Location605
Fault Handling and Tolerance
Large Scale Systems
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