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Pareto Optimization of CNN Models via Hardware-Aware Neural Architecture Search for Drainage Crossing Classification on Resource-Limited Devices

SessionWorkshop on Software and Hardware Co-Design of Deep Learning Systems in Accelerators (SHDA)

DescriptionEmbedded devices, constrained by limited memory and processors, require deep learning models to be tailored to their specifications. This research explores customized model architectures for classifying drainage crossing images. Building on the foundational ResNet-18, this paper aims to maximize prediction accuracy, reduce memory size, and minimize inference latency. Various configurations were systematically probed by leveraging hardware-aware neural architecture search, accumulating 1,717 experimental results over six benchmarking variants. The experimental data analysis, enhanced by nn-Meter, provided a comprehensive understanding of inference latency across four different predictors. Significantly, a Pareto front analysis with three objectives of accuracy, latency, and memory resulted in five non-dominated solutions. These standout models showcased efficiency while retaining accuracy, offering a compelling alternative to the conventional ResNet-18 when deployed in resource-constrained environments. The presentation concludes by highlighting insights drawn from the results and suggesting avenues for future exploration.

Author/Presenters

Yuke Li

University of California, Merced

Jiwon Baik

University of California, Santa Barbara

Md Marufi Rahman

University of North Texas

Iraklis Anagnostopoulos

Southern Illinois University

Ruopu Li

Southern Illinois University