Author

Jungmin Choi is a Memory System Architect and Senior Staff Engineer in Memory Forest x&D at SK hynix. He is responsible for developing the memory system architecture for CXL disaggregated memory solution. He joined SK hynix in 2018 as a memory system architect, working on system-level architecture design for emerging memory solutions. He has a diverse background spanning memory devices to controllers with expertise in the area of CPU, GPU, DSP, FPGAs, fabric interconnect, and memory system.