Author

Dr. Sanyam Mehta is a Master Technologist at HPE. He leads the Performance Modeling group, where he primarily works with other teams and/or processor vendors around performance estimation/improvement for future processors. Dr. Mehta's research interests lie at the intersection of hardware and software involving applications, compiler, computer architecture, and performance tools. Some of his recent work has involved application-aware microarchitecture (ISPASS' 23, HPCA' 23), architecture-aware performance tools (ISPASS' 22) and architecture-aware compilers (CC' 22).