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Design Considerations and Analysis of Multi-Level Erasure Coding in Large-Scale Data Centers
DescriptionMulti-level erasure coding (MLEC) has seen large deployments in the field, but there is no in-depth study of design considerations for MLEC at scale. In this paper, we provide comprehensive design considerations and analysis of MLEC at scale. We introduce the design space of MLEC in multiple dimensions, including various code parameter selections, chunk placement schemes, and various repair methods. We quantify their performance and durability, and show which MLEC schemes and repair methods can provide the best tolerance against independent/correlated failures and reduce repair network traffic by orders of magnitude. To achieve this, we use various evaluation strategies including simulation, splitting, dynamic programming, and mathematical modeling. We also compare the performance and durability of MLEC with other EC schemes such as SLEC and LRC and show that MLEC can provide high durability with higher encoding throughput and less repair network traffic over both SLEC and LRC.
Event Type
Paper
TimeWednesday, 15 November 202311am - 11:30am MST
Location403-404
Tags
Accelerators
Architecture and Networks
Data Analysis, Visualization, and Storage
Fault Handling and Tolerance
Registration Categories
TP
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