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Unleashing CGRA Potential for HPC
SessionResearch Posters Display
DescriptionThis poster highlights our previous and future design-space exploration effort to optimize our CGRA architecture for HPC, i.e., intra-CGRA interconnect optimization, FMA and transcendental operation on CGRA, programmable buffer, systolic-array style execution on CGRA, predication support, and FPGA based emulation on actual HPC environment.
Authors
Boma Adhi
RIKEN Center for Computational Science (R-CCS)
Emanuele Del Sozzo
RIKEN Center for Computational Science (R-CCS)
Carlos Cortes
RIKEN Center for Computational Science (R-CCS)
Xinyuan Wang
University of Toronto
RIKEN Center for Computational Science (R-CCS)
Tomohiro Ueno
RIKEN Center for Computational Science (R-CCS)
Kentaro Sano
RIKEN Center for Computational Science (R-CCS)
Event Type
Posters
Research Posters
TimeTuesday, 14 November 202310am - 5pm MST
LocationDEF Concourse
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