Author

Maria is Senior Member of Technical Staff at AMD. Prior to joining AMD, she was an HPC Engineer at Intel responsible for RAS system validation for the US DOE Aurora Exascale Supercomputer (A21). She has experience in cluster validation, integration, and execution in HPC, and extensive Software Engineering experience supporting mission and safety critical applications for the Automotive industry in the US and Mexico. She has published research in the areas of fault-tolerance for massively-parallel-processing, large-scale systems and on emerging non-volatile memories for embedded systems. Maria is a member of the SC21 and SC22 Inclusivity committees. At SC21 she hosted the Hispanic-Latinx Affinity group and participated in the Beowulf Bash panel on Composable Computing. Maria holds a M.Sc. in Computer Science from University of Delaware.