Author

Jeffrey Young is a senior research scientist in Georgia Tech’s School of Computer Science. With a background in computer architecture, his main research interests have focused on the intersection of high-performance computing and novel accelerators including GPUs, Xeon Phi, FPGAs, and Arm SVE processors. He is the director of a novel architecture testbed, the CRNCH Rogues Gallery, that aims to simplify and democratize access to novel post-Moore accelerators in the neuromorphic, reversible, and novel networking spaces. He received his PhD in computer engineering in 2013 from Georgia Tech's ECE department.