Author

Brannon Batson is a computer architect and hardware engineer at D. E. Shaw Research (DESRES), where he has worked on three generations of the Anton supercomputer. His work centers around the architecture, design, implementation, and numeric validation of specialized arithmetic pipelines. Prior to joining DESRES, Brannon was a Senior Hardware Engineer at Intel Corporation, where he was the lead inventor of the cache coherency protocol for Intel's system interface. Brannon received an M.S. in electrical engineering and a B.S. in computer engineering from Purdue University.