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The Impact of Process Topology on RMA Programming Models: A Study on NERSC Perlmutter
SessionResearch Posters Display
DescriptionRemote Memory Access (RMA) provides an alternate mechanism for data movement by separating communication with synchronization, exposing remote memory access features via one-sided communication semantics to a global address space. Performance of the most popular asynchronous RMA interfaces like MPI RMA and SHMEM has steadily improved over the past years due to better software/hardware support from the vendors and community-driven programming model standardization efforts.
Current RMA benchmarking efforts are mostly focused on investigating elementary data movement overheads between a process-pair within and across nodes, not considering a specific process topology. Distributed-memory applications on the other hand must deal with overlapped data distributions, which governs the underlying topology of the processes. We discuss the performance of SHMEM and MPI RMA (in comparison with MPI point-to-point) for grid and graph process topologies on NERSC Perlmutter supercomputer, demonstrating average and 99th percentile latencies.
Current RMA benchmarking efforts are mostly focused on investigating elementary data movement overheads between a process-pair within and across nodes, not considering a specific process topology. Distributed-memory applications on the other hand must deal with overlapped data distributions, which governs the underlying topology of the processes. We discuss the performance of SHMEM and MPI RMA (in comparison with MPI point-to-point) for grid and graph process topologies on NERSC Perlmutter supercomputer, demonstrating average and 99th percentile latencies.
Event Type
Posters
Research Posters
TimeWednesday, 15 November 202310am - 5pm MST
LocationDEF Concourse
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XO/EX